The Open Source RISC-V SweRV Cores have been increasingly adopted by organizations who prioritize a validated, production worthy core. The latest updates on the first commercial dual threaded, embedded SweRV EH2 will be highlighted. This talk will discuss progress on the open cache coherent memory fabric, OmniXtend. The breakthrough architecture uses low cost Ethernet to connect memory to hosts. OmniXtend frees main memory from the CPU and enable next generation memory centric architectures to become a reality.